This invention relates generally to amplifier circuits and is particularly directed to an arrangement for improving the stability and response time of a logarithmic amplifier.
A logarithmic amplifier (hereinafter referred to as a log amplifier) is a voltage amplifier having a large gain for small input signals and a reduced, although never zero, gain for larger signals. The ideal log amplifier provides an output voltage proportional to the logarithm of the input voltage. Such amplifiers are used in a wide range of applications because of their capability to handle a wide range of input signal amplitudes without becoming saturated. The typical log amplifier employs negative feedback that varies in magnitude with input signal level and permits the amplifier to operate in a stable manner over a wide input signal level range.
Where an amplifier with feedback performs a linear mathematical operation upon the input signal, the shunt impedance of the feedback loop does not change radically and amplifier stability is easily achieved. However, if the shunt impedance is variable to any appreciable extent, as in a log amplifier where the transfer characteristic of the feedback path (.beta.) varies with signal amplitude, the stability of the circuit may be severely affected over a wide input signal bandwidth. Amplifier stability may be improved by increasing the time constant of the circuit. However, increasing the amplifier circuit's time constant necessarily extends its response, or recovery, time. The response time may be defined as that period, following an excessively large input signal, during which a small input signal will be masked and will not appear at the amplifier's output. Therefore, these apparently mutually exclusive, yet highly desirable, log amplifier characteristics present a paradox to the circuit designer and represent an inherent limitation in log amplifiers.
The present invention avoids the limitations of the prior art and thus represents an improvement thereover by providing a log amplifier which affords a short response time with a high degree of amplifier stability without sacrificing one of these characteristics at the expense of the other. This is accomplished in the log amplifier of the present invention by an arrangement which provides uniform pole-zero compensation for all of the poles or zeros within the amplifier circuit.